CV Information
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Grant's Name,"Project's Title" (Research Period)(Role)[Sponsorship]
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1 | EXTERNAL GRANT INDUSTRY (BJIM), "EXPERIMENTAL AND COMPUTER SIMULATION ON WAFER-LEVEL WARPAGE FOR DIFFERENT REFLOW THERMAL PROFILES, WAFER SIZES AND SHAPES" (15.07.2024 - 14.07.2026) (Principal) [ INTEL ELECTRONICS (MALAYSIA) SDN. BHD. ] - Source: eR&I |
2 | EXTERNAL AGENCY (INDUSTRY/PRIVATE), "P04C2-13 FSI ANALYSIS OF THE EFFECT OF DIE THICKNESS AND ASPECT RATIO OF STACKED CHIP IN ENCAPSULATION PROCESS OF MOULDED UNDERFILL PACKAGING" (01.04.2014 - 31.03.2016) (Principal) [ COLLABORATIVE RESEARCH IN ENGINEERING, SCIENCE AND TECHNOLOGY CENTER (CREST) ] - Source: eR&I |
3 | EXTERNAL AGENCY (INDUSTRY/PRIVATE), "FSI ANALYSIS OF THE EFFECT OF STACKED CHIP WITH TSV'S IN ENCAPSULATION PROCESS OF 3D IC INTEGRATION PACKAGE" (01.09.2011 - 31.08.2013) (Principal) [ INTEL TECHNOLOGY SDN. BHD. ] - Source: eR&I |
4 | EXTERNAL AGENCY (INDUSTRY/PRIVATE), "STUDY OF FLUID/SOLID INTERACTION OF EPOXY FLOW DURING STAKED-CHIP ENCAPSULATION PROCESS" (01.09.2009 - 31.08.2011) (Principal) [ INTEL TECHNOLOGY SDN. BHD. ] - Source: eR&I |