CV Information
| |
---|---|
Grant's Name,"Project's Title" (Research Period)(Role)[Sponsorship]
| |
1 | EXTERNAL AGENCY (INDUSTRY/PRIVATE), "RTL BASED OPTIMIZED AX14-STREAM INTERCONNECT FOR INTEL FPGA" (15.04.2023 - 15.04.2024) (Principal) [ INTEL MICROELECTRONICS (M) SDN. BHD. ] - Source: eR&I |